ZILOG Z280

The Zilog Z280 was an enhancement of the Zilog Z80 architecture introduced in July 1987, basically a slighly improved CMOS version of the earlier NMOS Zilog Z800, both versions were commercial failures. They added a memory management unit (MMU) to expand the addressing range to 16 MB, features for multitasking and multiprocessor and coprocessor configurations, a 256 byte cache, and a huge number of new instructions and addressing modes (giving a total of over 2000 combinations). Its internal clock signal ran at 2 or 4 times the external clock's speed (e.g. a 16MHz CPU with a 4MHz bus). Later, more successful, enhancements to the Z80-architecture include Hitachi HD64180 and Zilog eZ80, among others. See further Zilog Z800.
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An enhanced version of the Zilog Z80 with a 16 bit architecture, introduced in July, 1987. It added an MMU to expand addressing to 16Mb, features for multitasking, a 256 byte cache, and a huge number of new op codes (giving a total of over 2000!). Its internal clock runs at 2 or 4 times the external clock (e.g. a 16MHz CPU with a 4MHz bus).
(1994-10-31)