Reduced Instruction Set Computer

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Reduced Instruction Set Computer
RISC, processor that can process a reduced number of commands in order to enable a higher work speed


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Reduced instruction set computer
The reduced instruction set computer (RISC, pronounced like "risk") is a CPU design philosophy that favors an instruction set reduced both in size and complexity of addressing modes, in order to enable easier implementation, greater instruction level parallelism, and more efficient compilers.  As of 2007, common RISC microprocessors families include the DEC AlphaARCARMAVRMIPSPA-RISCPower Architecture (including PowerPC), and SPARC. The idea was originally inspired by the discovery that many of the features that were included in traditional CPU designs to facilitate coding were being ignored by the programs that were running on them. Also these more complex features took several processor cycles to be performed. Additionally, the performance gap between the processor and main memory was increasing. This led to a number of techniques to streamline processing within the CPU, while at the same time attempting to reduce the total number of memory accesses.
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WordNet 2.0 DictionaryDownload this dictionary
reduced instruction set computer
Noun
1. (computer science) a kind of computer architecture that has a relatively small set of computer instructions that it can perform
(synonym) reduced instruction set computing, RISC
(antonym) complex instruction set computing, complex instruction set computer, CISC
(hypernym) computer architecture, architecture
(classification) computer science, computing


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Reduced Instruction Set Computer
<processor> (RISC) A processor whose design is based on the rapid execution of a sequence of simple instructions rather than on the provision of a large variety of complex instructions (as in a Complex Instruction Set Computer).
Features which are generally found in RISC designs are uniform instruction encoding (e.g. the op-code is always in the same bit positions in each instruction which is always one word long), which allows faster decoding; a homogenous register set, allowing any register to be used in any context and simplifying compiler design; and simple addressing modes with more complex modes replaced by sequences of simple arithmetic instructions.
Examples of (more or less) RISC processors are the Berkeley RISCHP-PAClipperi960AMD 29000MIPS R2000 and DEC AlphaIBM's first RISC computer was the RT/PC (IBM 801), they now produce the RISC-based RISC System/6000 and SP/2 lines.
Despite Apple Computer's bogus claims for their PowerPC-based Macintoshes, the first RISC processor used in a personal computer was the Advanced RISC Machine (ARM) used in the Acorn Archimedes.
(1997-06-03)


(c) Copyright 1993 by Denis Howe

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