RISC

n. microprocessor designed to recognize only a small number of commands in order to accelerate processing speed (Computers)

The reduced instruction set computer (RISC, pronounced like "risk") is a CPU design philosophy that favors an instruction set reduced both in size and complexity of addressing modes, in order to enable easier implementation, greater instruction level parallelism, and more efficient compilers.  As of 2007, common RISC microprocessors families include the DEC Alpha, ARC, ARM, AVR, MIPS, PA-RISC, Power Architecture (including PowerPC), and SPARC. The idea was originally inspired by the discovery that many of the features that were included in traditional CPU designs to facilitate coding were being ignored by the programs that were running on them. Also these more complex features took several processor cycles to be performed. Additionally, the performance gap between the processor and main memory was increasing. This led to a number of techniques to streamline processing within the CPU, while at the same time attempting to reduce the total number of memory accesses.
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Noun
1. (computer science) a kind of computer architecture that has a relatively small set of computer instructions that it can perform
(synonym) reduced instruction set computing, reduced instruction set computer
(antonym) complex instruction set computing, complex instruction set computer, CISC
(hypernym) computer architecture, architecture
(classification) computer science, computing

RISC, reduced instruction set computer, microprocessor designed to recognize only a small number of commands in order to accelerate processing speed (Computers)