Joint Test Action Group

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Joint Test Action Group
Joint Test Action Group (JTAG) is the usual name used for the IEEE 1149.1 standard entitled Standard Test Access Port and Boundary-Scan Architecture for test access ports used for testing printed circuit boards using boundary scan.JTAG was an industry group formed in 1985 to develop a method to test populated circuit boards after manufacture. At the time, multi-layer boards and non-lead-frame ICs were becoming standard and making connections between ICs not available to probes. The majority of manufacturing and field faults in circuit boards were due to solder joints on the boards, imperfections in board connections, or the bonds and bond wires from IC pads to pin lead frames. JTAG was meant to provide a pins-out view from one IC pad to another so all these faults could be discovered. The industry standard finally became an IEEE standard in 1990 as IEEE Std. 1149.1-1990 after many years of initial use. That same year Intel released the first processor with JTAG: the 80486 which led to quicker industry adoption by all manufacturers. In 1994, a supplement that contains a description of the boundary scan description language (BSDL) was added. Since then, this standard has been adopted by electronics companies all over the world. Boundary-scan is nowadays mostly synonymous with JTAG.
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Joint Test Action Group
<architecturebodyelectronicsintegrated circuitstandardstesting> (JTAG, or "IEEE Standard 1149.1") A standard specifying how to control and monitor the pins of compliant devices on a printed circuit board.
Each device has four JTAG control lines. There is a common reset (TRST) and clock (TCLK). The data line daisy chains one device's TDO pin to the TDI pin on the next device.
The protocol contains commands to read and set the values of the pins (and, optionally internal registers) of devices. This is called "boundary scanning". The protocol makes board testing easier as signals that are not visible at the board connector may be read and set.
The protocol also allows the testing of equipment, connected to the JTAG port, to identify components on the board (by reading the device identification register) and to control and monitor the device's outputs.
JTAG is not used during normal operation of a board.
JTAG Technologies B.V..
Boundary Scan/JTAG Technical Information - Xilinx, Inc..
Java API for Boundary Scan FAQs - Xilinx Inc..
JTAG Boundary-Scan Test Products - Corelis, Inc..
"Logic analyzers stamping out bugs at the cutting edge", EDN Access, 1997-04-10.
IEEE 1149.1 Device Architecture - Boundary-Scan Tutorial from ASSET InterTech, Inc..
"Application-Specific Integrated Circuits", Michael John Sebatian Smith, published Addison-Wesley - Design Automation Cafe.
Software Debug options on ASIC cores - Embedded Systems Programming Archive.
Designing for On-Board Programming Using the IEEE 1149.1 (JTAG) Access Port - Intel.
Built-In Self-Test Using Boundary Scan by Texas Instruments - EDTN Network.
(1999-11-15)


(c) Copyright 1993 by Denis Howe

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